Job title: Sr. FPGA Verification Engineer – Austin, TX
Company: Trend Micro
Job description: Trend Micro, a global cybersecurity leader, helps make the world safe for exchanging digital information. Fueled by decades of security expertise, world-leading global threat research and intelligence, and continuous innovation, our cybersecurity platform protects hundreds of thousands of organizations and millions of individuals across clouds, networks, devices, and endpointsWith 7,000 employees across 65 countries, and the world’s most advanced global threat research and intelligence, Trend Micro enables organizations to simplify and secure their connected world.Position Summary:Trend Micro is looking for a Sr. FPGA Verification Engineer to join our FPGA team in Austin, Texas. Trend Micro has been developing advanced multi-million gate FPGAs to accelerate network packet processing and security functions for over 20 years. The FPGA team develops leading-edge, high-performance implementations of encryption/decryption, pattern matching, and data extraction/analysis functions among others, as well as a number of system interfaces.Responsibilities:As the Sr. FPGA Verification Engineer, you will be responsible for the development of verification test bench, verification components, debugging failures and creating simulation cases at various levels that require the following skillsets, as well as leading/mentoring the small team of less senior Verification Engineers.UVM based testbench development for FPGA implementationsStrong skills in debug, failure re-creation and root cause analysisOwnership of testbench development, including stimulus, driver, monitors, response checkers, assertions and coverage using system Verilog and advanced UVM methodology.Development of direct and constrained-random stimulusUnderstanding and analysis of RTL code, functional, assertion coverage resultsEfficient debugging and logic skills. Familiarity with major simulation and debug tool vendors is a plus.Improving and refining the verification process, methodology, and metricsWorking with RTL engineers on defining and documenting Verification Requirements ListQualifications:BS degree or higher in EE or CE10+ years of design verification experience in either FPGAs or ASICsExcellent analytical, problem solving, communication, and leadership skillsAbility to collaborate, communicate, and work in a team environment.Knowledge of simulation tools i.e. VCS, DVE.OOP, UVM and System Verilog experience.Verification flow enhancements using a scripting language such as Python.Experience integrating vendor provided VIPs in UVM testbench is a plus.Experience with AXI4 and AXI4-Stream is a plus.Experience with PCI-Express is a plus.Experience with Networking protocols i.e. Ethernet, IP, TCP/UDP is a plus#LI-EC1At Trend Micro, we embrace change, empower people, and encourage innovation in a connected world. Our diversity and multicultural workforce are key contributing factors to our success across the globe. Trend Micro provides equal employment opportunity for all applicants and employees. Trend Micro does not unlawfully discriminate on the basis of race, color, religion, sex, pregnancy and childbirth or related medical conditions, national origin, ancestry, age, physical or mental disability, medical condition, family care leave status, veteran status, marital status, sexual orientation, or gender identity.
Expected salary:
Location: Austin, TX
Job date: Fri, 28 Jun 2024 07:52:17 GMT
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